This invention relates to a differential amplifier having output current limiting, comprising:
first and second transistors each having a control electrode, a first and a second main electrode; PA1 first and second output terminals coupled to the first main electrodes of the respective first and second transistors; PA1 a first current terminal and a second current terminal coupled to the first current terminal; PA1 at least a first diode having an anode coupled to the second main electrode of the first transistor and a cathode coupled to the first current terminal; PA1 at least a second diode having an anode coupled to the second main electrode of the second transistor and a cathode coupled to the second current terminal; PA1 a first current source coupled to the second main electrode of the first transistor for applying a first current to the first transistor; PA1 a second current source coupled to the second main electrode of the second transistor for applying a second current to the second transistor; PA1 a third current source coupled to the first current terminal for applying a third current to the first current terminal; PA1 a fourth current source coupled to the second current terminal for applying a fourth current to the second current terminal. PA1 means for applying reference voltages to the control electrodes of the first and second transistors; PA1 a fifth current source coupled to the first current terminal for applying to the first current terminal a fifth current which is smaller than the third current and is opposite to the third current; PA1 a sixth current source coupled to the second current terminal for applying to the second current terminal a sixth current which is smaller than the fourth current and is opposite to the fourth current; PA1 at least a third diode whose anode is coupled to the first current terminal and whose cathode is coupled to the second current terminal; PA1 at least a fourth diode whose cathode is coupled to the first current terminal and whose anode is coupled to the second current terminal; PA1 a first signal current source coupled to the first current terminal for applying a first signal current to the first current terminal; PA1 a second signal current source coupled to the second current terminal for applying to the second current terminal a second signal current which is opposite to the first signal current.
A differential amplifier of this type is known from Japanese Patent Application No. 61-226486 of which an abstract has been published in Japan Patent Abstracts under No. 63-80605. Differential amplifiers having output current limiting are generally applied to electronic amplifier circuits in which the dynamic signal range is to be kept within certain limits in order to avoid overload.
In the prior-art differential amplifier the first and second current terminals are interconnected, the third and fourth current sources are united into a single current source and the whole amplifier is driven by means of a differential signal on the control electrodes of the first and second transistors. Depending on the sign of the differential signal the first or second diode will no longer be conductive and will block once the differential signal has exceeded a certain value. The output current of the first or second transistor coupled to either diode will then be limited to the first or second current. The advantage of this prior-art differential amplifier is that the output currents are limited due to a switching operation by the first or second diode and not by the first or second transistor. The first and second transistors continue to be conductive so that the limiting of the output currents is only determined by the switching behavious of the diodes. This enables a proper limiting at high frequencies.
A disadvantage of the prior-art differential amplifier is the fact that the signal transmission is rather non-linear in the range where there is no current limiting yet. The non-linear voltage-current transfer as it is from the control electrode to the second main electrode of the first and second transistors is additionally distorted by the non-linear impedance of the first and second diodes.